Convergence in (Social) Influence Networks Silvio Frischknecht, Barbara Keller, and Roger Wattenhofer Computer Engineering and Networks Laboratory (TIK), ETH Z¨urich, Switzerland {fsilvio,barkelle,wattenhofer}@tik.ee.et

Source URL: www.tik.ee.ethz.ch

Prof. Laurent Vanbever | Computer Engineering and Networks Laboratory | www.tik.ee.ethz.ch Prof. Laurent Vanbever Networked Systems Curriculum Vitae Prof. Laurent Vanbever

Source URL: www.vanbever.eu

• Computing
• Technology
• Computer networking
• Computer architecture
• Network architecture
• Networking hardware
• Configuration management
• Software-defined networking
• Internet
• SIGCOMM
• Router
• Computer network

Run and Be Safe: Mixed-Criticality Scheduling with Temporary Processor Speedup Pengcheng Huang, Pratyush Kumar, Georgia Giannopoulou, Lothar Thiele Computer Engineering and Networks Laboratory, ETH Zurich, 8092 Zurich, S

Source URL: www.tik.ethz.ch

• Computing
• Engineering
• Technology
• Analysis of parallel algorithms
• Parallel computing
• Speedup
• Real-time computing
• Mixed criticality
• Worst-case execution time
• Scalability

Institut für Technische Informatik und Kommunikationsnetze Computer Engineering and Networks Laboratory Prof. L. Thiele

Source URL: www.tik.ee.ethz.ch

• Engineering
• Systems engineering
• Embedded system
• Criticality
• Safety engineering
• Mixed criticality

Zippy: On-Demand Network Flooding Felix Sutton, Bernhard Buchli, Jan Beutel and Lothar Thiele Computer Engineering and Networks Laboratory ETH Zurich, Switzerland {fsutton, bbuchli, beutel, thiele}@tik.ee.ethz.ch

Source URL: www.tik.ee.ethz.ch

Hey! Presto: Edge-based Load Balancing for Fast Datacenter Networks Jon Crowcroft The Computer Laboratory, University of Cambridge Cambridge, UK

Source URL: conferences.sigcomm.org

Run and Be Safe: Mixed-Criticality Scheduling with Temporary Processor Speedup TIK Report No. 357 Pengcheng Huang, Pratyush Kumar, Georgia Giannopoulou, Lothar Thiele Computer Engineering and Networks Laboratory, ETH Zur

Source URL: www.tik.ethz.ch

• Real-time computing
• Analysis of parallel algorithms
• Scheduling
• Computing
• Speedup
• Technology
• Worst-case execution time
• Task

An Efficient Real Time Fault Detection and Tolerance Framework Validated on the Intel SCC Processor Devendra Rai, Pengcheng Huang, Nikolay Stoimenov and Lothar Thiele Computer Engineering and Networks Laboratory, ETH Zur

Source URL: www.tik.ethz.ch

• Engineering
• Computing
• Systems science
• Inter-process communication
• Kahn process networks
• FIFO
• Fault tolerance
• Queue
• Data buffer
• Fault model

Energy Efficient DVFS Scheduling for Mixed-Criticality Systems Pengcheng Huang, Pratyush Kumar, Georgia Giannopoulou, Lothar Thiele Computer Engineering and Networks Laboratory, ETH Zurich, 8092 Zurich, Switzerland first

Source URL: www.tik.ethz.ch

• Operations research
• Computational problems
• Mixed criticality
• Safety engineering
• Software engineering
• Systems engineering
• Power management
• Mathematical optimization
• Optimization problem
• Systems science
• Computing
• Systems theory

Opening the Sensornet Black Box Technical Report SINGJung Il Choi, Jung Woo Lee, Megan Wachs, and Philip Levis Computer Systems Laboratory Stanford University

Source URL: sing.stanford.edu

• Wireless networking
• OSI protocols
• Wireless sensor network
• Network performance
• Local area networks
• Collection Tree Protocol
• Conference on Embedded Networked Sensor Systems
• Throughput
• Carrier sense multiple access with collision avoidance
• Packet loss
• Ethernet
• Data link layer